Founding ASIC Engineer (Architecture & RTL)

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• Role: Engineering / Electrical
• Experience: 1+ years
• Visa: US citizenship/visa not required

This is a hands-on role with substantial influence over our first chip, our engineering process, and the team we build. We're looking for someone who has built real chips and understands the practical challenges of taking a design from architecture through implementation, tapeout, and silicon validation.

What you'll own

• Develop the chip architecture and microarchitecture with the founders, making explicit trade-offs across model quality, latency, throughput, power, and area.
• Design compute datapaths, low-precision arithmetic units, weight-storage structures, SRAM/KV-cache systems, scheduling, and on-chip data movement.
• Write, review, and optimise synthesizable RTL in Verilog or SystemVerilog, including critically evaluating generated hardware where useful.
• Develop a robust verification strategy using software reference models, simulation, assertions, and formal methods where appropriate.
• Use synthesis, static timing analysis, and representative physical implementation experiments to assess feasibility and identify problems early.
• Make implementation-aware design decisions around timing, congestion, power, memory macros, and physical constraints.
• Help define implementation requirements and evaluate external physical-design, IP, and foundry partners.
• Work with external partners through physical implementation, tapeout preparation, and silicon bring-up.
• Establish our hardware development workflows, tools, verification infrastructure, and engineering standards.
• Help recruit and mentor future hardware engineers as the team grows.